OREGAMI: Software Tools for Mapping Parallel Computations to Parallel Architectures
dc.contributor.author | Lo, Virginia M. | |
dc.contributor.author | Rajopadhye, Sanjay | |
dc.contributor.author | Gupta, Samik | |
dc.contributor.author | Keldsen, David | |
dc.contributor.author | Mohamed, Moataz A. | |
dc.contributor.author | Telle, Jan | |
dc.date.accessioned | 2023-06-20T20:15:24Z | |
dc.date.available | 2023-06-20T20:15:24Z | |
dc.date.issued | 1990-01-19 | |
dc.description | 22 pages | en_US |
dc.description.abstract | The mapping problem in message-passing parallel processors involves the assignment of tasks in a parallel computation to processors and the routing of inter-task messages along the links of the interconnection network. We have developed a unified set of software tools called OREGAMI for automatic and guided mapping of parallel computations to parallel architectures in order to achieve portability and maximal performance from parallel systems. Our tools include a description language which enables the programmer of parallel algorithms to specify information about the static and dynamic communication behavior of the computation to be mapped. This information is used by the mapping algorithms to assign tasks to processors and to route communication in the network topology. Two key features of our system are (a) the ability to take advantage of the regularity present in both the computation structure and the interconnection network and (b) the desire to balance the user's knowledge and intuition with the computational power of efficient combinatorial algorithms. | en_US |
dc.identifier.uri | https://hdl.handle.net/1794/28435 | |
dc.language.iso | en | en_US |
dc.publisher | University of Oregon | en_US |
dc.rights | Creative Commons BY-NC-ND 4.0-US | en_US |
dc.subject | mapping | en_US |
dc.subject | routing | en_US |
dc.subject | embedding | en_US |
dc.subject | regular parallel computation | en_US |
dc.subject | matching | en_US |
dc.title | OREGAMI: Software Tools for Mapping Parallel Computations to Parallel Architectures | en_US |
dc.type | Article | en_US |